Hi Allen:
我使用的是mcbsp_edma的例子, 想请问
1. 在范例中在mcbsp的设定, 都是使用CSL_mcbsp的function
在C6657的PDK内没有这些function
所以就直接设定McBSP参数, 同先前提问中的I2S_McBSP_Setup
这样是否可行
2. EDMA部分, 依原先C6454的设定,修改成C6657
C6657的mcbps在event 36及event 37
故修改了regionAccess.draeh = 0xffff
#define CSL_EDMA3_CHA_REVT0 36
#define CSL_EDMA3_CHA_XEVT0 37
但结果都无法进入中断, 请帮忙看问题发生在什么地方, 谢谢.
完整程序
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程序如下
void mcbsp_edma_setup ( void ) { CSL_McbspRegs *mcbspRegs = (CSL_McbspRegs *)CSL_Mcbsp0_CFG_DATA_REGS; CSL_Edma3ParamHandle hParamBasic; CSL_Edma3ParamHandle hParamBasic1; CSL_Edma3ParamSetup myParamSetup; CSL_Edma3ParamSetup myParamSetup1; CSL_Edma3ChannelObj ChObj, ChObj1; CSL_Edma3ChannelAttr chParam; CSL_Edma3Context edmaContext; CSL_Edma3Obj edmaObj; CSL_Edma3QueryInfo info; CSL_Edma3CmdIntr regionIntr; CSL_Edma3CmdDrae regionAccess; Uint32 i, j; CSL_BitMask16 ctrlMask; for (i = 0, j = 1; i < DATATX_COUNT; i++, j++) { srcBuff[i] = j; dstBuff[i] = 0; } /* Intc Module Initialization */ intcContext.eventhandlerRecord = EventHandler; intcContext.numEvtEntries = 10; CSL_intcInit(&intcContext); /* Enable NMIs */ CSL_intcGlobalNmiEnable(); /* Enable Global Interrupts */ intStat = CSL_intcGlobalEnable(&state); /* Opening a handle for the Event edma */ vectId = CSL_INTC_VECTID_4; hIntcEdma = CSL_intcOpen(&intcObjEdma, CSL_INTC0_CPU_3_2_EDMA3CCINT0,//CSL_INTC_EVENTID_EDMA3CC_INT0, &vectId, &status); /* Edma Module Initialization */ CSL_edma3Init(&edmaContext); /* Edma Module Level Open */ hModule = CSL_edma3Open(&edmaObj, CSL_TPCC_2/*CSL_EDMA3*/, NULL, &status); /* Query Module Info */ CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INFO, &info); /********************************Setup for Tx******************************/ /* Setup the DRAE Masks */ regionAccess.region = CSL_EDMA3_REGION_GLOBAL;//CSL_EDMA3_REGION_0; regionAccess.drae = 0; regionAccess.draeh = 0xFFFF; CSL_edma3HwControl(hModule, CSL_EDMA3_CMD_DMAREGION_ENABLE, ®ionAccess); /* Open transmit channel */ chParam.regionNum = CSL_EDMA3_REGION_GLOBAL;//CSL_EDMA3_REGION_0; chParam.chaNum = CSL_EDMA3_CHA_XEVT0; hChannel37 = CSL_edma3ChannelOpen(&ChObj, CSL_TPCC_2,//CSL_EDMA3, &chParam, &status); /* Channel setup */ hParamBasic = CSL_edma3GetParamHandle(hChannel37, CSL_EDMA3_CHA_XEVT0, &status); /* param setup */ myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \ CSL_EDMA3_TCCH_DIS, \ CSL_EDMA3_ITCINT_DIS, \ CSL_EDMA3_TCINT_EN, \ CSL_EDMA3_CHA_XEVT0, \ CSL_EDMA3_TCC_NORMAL, \ CSL_EDMA3_FIFOWIDTH_32BIT, \ CSL_EDMA3_STATIC_DIS, \ CSL_EDMA3_SYNC_A, \ CSL_EDMA3_ADDRMODE_INCR,\ CSL_EDMA3_ADDRMODE_INCR \ ); myParamSetup.srcAddr = (Uint32)srcBuff; myParamSetup.dstAddr = (Uint32)CSL_MCBSP_0_TX_EDMA_REGS; myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(4, 16); myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(4, 0); myParamSetup.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(CSL_EDMA3_LINK_NULL, 1); myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0, 0); myParamSetup.cCnt = 1; CSL_edma3HwChannelSetupParam(hChannel37, CSL_EDMA3_CHA_XEVT0); CSL_edma3HwChannelSetupQue(hChannel37, CSL_EDMA3_QUE_1); CSL_edma3ParamSetup(hParamBasic, &myParamSetup); CSL_edma3HwChannelControl(hChannel37, CSL_EDMA3_CMD_CHANNEL_DISABLE, NULL); CSL_edma3HwChannelControl(hChannel37, CSL_EDMA3_CMD_CHANNEL_CLEAR, NULL); /* clear the error registers */ chErrClear.missed = TRUE; chErrClear.secEvt = TRUE; CSL_edma3HwChannelControl(hChannel37, CSL_EDMA3_CMD_CHANNEL_CLEARERR, &chErrClear); CSL_edma3HwChannelControl(hChannel37, CSL_EDMA3_CMD_CHANNEL_ENABLE, NULL); /********************************Setup for Rx******************************/ /* Open Receive channel */ chParam.regionNum = CSL_EDMA3_REGION_GLOBAL;//CSL_EDMA3_REGION_0; chParam.chaNum = CSL_EDMA3_CHA_REVT0; hChannel36 = CSL_edma3ChannelOpen(&ChObj1, CSL_TPCC_2,//CSL_EDMA3, &chParam, &status); /* Channel Setup */ hParamBasic1 = CSL_edma3GetParamHandle(hChannel36, CSL_EDMA3_CHA_REVT0, &status); /* Param Setup */ myParamSetup1.option = CSL_EDMA3_OPT_MAKE(FALSE,FALSE,FALSE,TRUE,\ CSL_EDMA3_CHA_REVT0, \ CSL_EDMA3_TCC_NORMAL, \ CSL_EDMA3_FIFOWIDTH_32BIT, \ CSL_EDMA3_STATIC_DIS, \ CSL_EDMA3_SYNC_A, \ CSL_EDMA3_ADDRMODE_INCR, \ CSL_EDMA3_ADDRMODE_INCR \ ); myParamSetup1.srcAddr = (Uint32)CSL_MCBSP_0_RX_EDMA_REGS; myParamSetup1.dstAddr = (Uint32)dstBuff; myParamSetup1.aCntbCnt = CSL_EDMA3_CNT_MAKE(4, 16); myParamSetup1.srcDstBidx = CSL_EDMA3_BIDX_MAKE(0, 4); myParamSetup1.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(CSL_EDMA3_LINK_NULL, 1); myParamSetup1.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0, 0); myParamSetup1.cCnt = 1; CSL_edma3HwChannelSetupParam(hChannel36, CSL_EDMA3_CHA_REVT0); CSL_edma3HwChannelSetupQue(hChannel36, CSL_EDMA3_QUE_1); CSL_edma3ParamSetup(hParamBasic1, &myParamSetup1); EventRecord.handler = &eventEdmaHandler; EventRecord.arg = (void*)(hModule); CSL_intcPlugEventHandler(hIntcEdma, &EventRecord); /* Enabling event edma */ CSL_intcHwControl(hIntcEdma, CSL_INTC_CMD_EVTENABLE, NULL); /* Hook up the EDMA Event with an ISR */ EdmaEventHook(CSL_EDMA3_CHA_XEVT0, txmyIsr); EdmaEventHook(CSL_EDMA3_CHA_REVT0, rxmyIsr); /* Enable the interrupts */ regionIntr.region = CSL_EDMA3_REGION_GLOBAL;//CSL_EDMA3_REGION_0; //regionIntr.intr = (1 << CSL_EDMA3_CHA_XEVT0) | (1 << CSL_EDMA3_CHA_REVT0); //regionIntr.intrh = 0; regionIntr.intr = 0;//(1 << CSL_EDMA3_CHA_XEVT0) | (1 << CSL_EDMA3_CHA_REVT0); regionIntr.intrh = (1 << 4) | (1 << 5); CSL_edma3HwControl(hModule, CSL_EDMA3_CMD_INTR_ENABLE, ®ionIntr); /* Disable cahnnels and clear the EDMA event registers */ CSL_edma3HwChannelControl(hChannel36, CSL_EDMA3_CMD_CHANNEL_DISABLE, NULL); CSL_edma3HwChannelControl(hChannel36, CSL_EDMA3_CMD_CHANNEL_CLEAR, NULL); /* clear the error registers */ chErrClear.missed = TRUE; chErrClear.secEvt = TRUE; CSL_edma3HwChannelControl(hChannel36, CSL_EDMA3_CMD_CHANNEL_CLEARERR, &chErrClear); /* Enable the receive channel */ CSL_edma3HwChannelControl(hChannel36, CSL_EDMA3_CMD_CHANNEL_ENABLE, NULL); /* Enable MCBSP transmit and receive */ #if 0 ctrlMask = CSL_MCBSP_CTRL_TX_ENABLE | CSL_MCBSP_CTRL_RX_ENABLE; CSL_mcbspHwControl(hMcbsp, CSL_MCBSP_CMD_RESET_CONTROL, &ctrlMask); #endif // if (!(mcbspRegs->SPCR & CSL_MCBSP_SPCR_XEMPTY_MASK)) // Feed DXR if XSR is empty. // mcbspRegs->DXR = 0xaa55; WAIT_FOR_1_CLK; /* wait for Transmit complete Interrupt */ while (!intFlag); /* wait for Transmit complete Interrupt */ while (!rxintFlag); /* Disable cahnnels and clear the EDMA event registers */ CSL_edma3HwChannelControl(hChannel36, CSL_EDMA3_CMD_CHANNEL_DISABLE, NULL); CSL_edma3HwChannelControl(hChannel37, CSL_EDMA3_CMD_CHANNEL_DISABLE, NULL); CSL_edma3HwChannelControl(hChannel36, CSL_EDMA3_CMD_CHANNEL_CLEAR, NULL); CSL_edma3HwChannelControl(hChannel37, CSL_EDMA3_CMD_CHANNEL_CLEAR, NULL); /* clear the error registers */ chErrClear.missed = TRUE; chErrClear.secEvt = TRUE; CSL_edma3HwChannelControl(hChannel36, CSL_EDMA3_CMD_CHANNEL_CLEARERR, &chErrClear); CSL_edma3HwChannelControl(hChannel37, CSL_EDMA3_CMD_CHANNEL_CLEARERR, &chErrClear); CSL_edma3ChannelClose(hChannel36); CSL_edma3ChannelClose(hChannel37); CSL_edma3Close(hModule); CSL_intcClose(hIntcEdma); }